CONSTRUCTION OF
SYNCHRONOUS FIFO
Aim: The main aim of
this project is to design a synchronous FIFO.
Block Diagram:
DESCRIPTION:
FIFO is an acronym for First In, First Out,
FIFOs are used commonly in electronics circuits for buffering and flow control.
In hardware form a FIFO primarily consists of a set of read and write pointers,
storage and control logic. A synchronous FIFO is a FIFO where the different
clock is used for both reading and writing. An asynchronous FIFO uses different
clocks for reading and writing.
This design is implemented using a VHDL
language.
REQUIRED SKILL SET:
- Knowledge on Digital design.
- Knowledge on VHDL programming.
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