Tuesday, 22 January 2013

SIMPLE BUS INTERFACE



SIMPLE BUS INTERFACE

Aim: The main aim of this project is to design bus controller that interfaces one processor to another and peripherals.

Block Diagram:

 
DESCRIPTION:
            In this project we are going to implement a circuit in the FPGA, Which can control a bus interface between processor and different peripherals. A bus interface implements a bus protocol for a processor .A bus protocol defines a sequence of actions over a set of data, address, and control lines, to carry out a data transfer over those lines from one processor to another.      

REQUIRED COMPONENTS:

  • FPGA
  • XILINX ISE


REQUIRED SKILL SET:

  • Knowledge on Digital design.
  • Knowledge on VHDL programming.

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